SDA9489X
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| Supplier Information | Part Number | Mfg | Pack | D/C | Description | Inquire |
The following two figures show 100/120Hz applications with the Micronas Featurebox SDA 9400/01. As the chip supports two I2C addresses and owns a RGB switch dual-PiP applications are easy to implement. The arrangement for best possible performance is shown in the fig. (5-1).
Figure 5-1 SDA 9589X application with insertion in front of the featurebox
The output of two ’SOPHISTICUS’ are connected to the YUV (or RGB) input of the video processor of the main channel. Due to the 4:2:2 processing within the SDA 9400 the inset picture remains brilliant.
Figure 5-2 SDA 9589X application with insertion behind the featurebox
Connecting the SDA 9589X/SDA 9489X directly to the RGB input of the RGB processor is possible as well. One picture is generated from SDA 9589X/SDA 9489X device, the other one from the featurebox. This cheap implementation preserves the chroma of inset channel at its full bandwidth, although frame mode is only possible for PiP pictures
smaller than 1/9. The output of an OSD/Text processor may be fed to the RGB switch of the SDA 9589X/SDA 9489X.
| Parameter | Symbol | Limit Values | Unit | Remark | |||
| min. | max. | ||||||
| Ambient temperature | TA | 0 | 70 | °C | |||
| Storage temperature | Tstg | -55 | 125 | °C | |||
| Junction temperature | Tj |
|
125 | °C | |||
| Soldering temperature | TSOLD |
|
260 | °C | duration <10s | ||
| Input voltage | Vi | -0.3V | VDD + 0.3 V | 1 | except SDA, SCL, HSP, VSP | ||
| Vi | -0.3 | 5.5 | V | SDA, SCL, HSP, VSP only | |||
| Output voltage | VQ | -0.3V | VDD + 0.3 V | 1 | except SDA | ||
| VQ | -0.3 | 5.5 | V | SDA only | |||
| Supply voltages | VDD | -0.3 | 3.6 | V |
| ||
| Supply voltage differentials | – 0.25 | 0.25 | V |
| |||
| Total power dissipation | Ptot |
|
0.85 | W |
| ||
| Latch-up protection | ILU | -100 | 100 | mA | |||
| ESD robustness |
|
-2000 | 2000 | V | HBM: 1.5kτ, 100pF | ||
• Single chip solution:
– AD-conversion for CVBS or Y/C or YUV1), multistandard color decoding, PLL for
synchronization of inset channel, decimation filtering, embedded memory, RGBmatrix,
DA-conversion, RGB/YUV switch, data-slicer and clock generation
integrated on chip
• Analog inputs:
– 3x CVBS or 1x CVBS and 1x Y/C or 1xYUV 1)alternatively
– Clamping of each input
– All ADCs with 8 bit amplitude resolution
– Automatic Gain Control (AGC) for Y and CVBS
• Inset Synchronization:
– Multiple time constants for reliable synchronization
– Automatic recognition of 625 lines / 525 lines standard
• Color Decoder:
– PAL-B/G, PAL-M, PAL-N(Argentina), PAL60, NTSC-M, NTSC4.4 and SECAM
– Adjustable color saturation
– Hue control for NTSC
– Automatic Chroma Control (-24 dB ... +6 dB)
– Automatic recognition of chroma standards: different search strategies selectable
– Single crystal for all standards
– IF-characteristic compensation filter
• Decimation:
– PIP sizes between 1/81 and 1/4 adjustable with steps of 2 lines and 4 pixel
– Resolution up to 324 luminance and 2x81 chrominance pixels per inset line
– Horizontal and vertical filtering dependent on picture size
– Automatic zoom in/out possible with three speeds
• Display Features:
– 7 bit per pixel stored in memory
– Field and joint-line free frame mode display (even at 100/120 Hz AABB with picture
sizes<=1/9)
– Two ’split-screen’ modes with horizontal decimation of 2 and vertical of 1.5 or 1.0
– POP display
– Up to 12 pictures of 1/36th size (11 still and 1 moving)
– Up to 6 pictures of 1/16th size (5 still and 1 moving)
– Up to 3 pictures of 1/9th size (2 still and 1 moving)
– Display on VGA and SVGA screen (fH limited to 40kHz)
– 8 different read frequencies for 16:9 compatibility
– Line doubling mode for progressive scan applications
– Freeze picture
– Coarse positioning at 4 corners of the parent picture
– Fine positioning at steps of 4 pixels and 2 lines
– Wipe in / out programmable with 3 time periods
• Output signal processing:
– 7 Bit DAC
– RGB or YUV switch: insertion of an external source without PIP processing
– Digital interpolation for anti-imaging
– Adjustable transient improvement for luma (peaking)
– Contrast, Brightness and Pedestal Level adjustable
– Analog outputs: Y, +(B-Y), +(R-Y), or Y, -(B-Y), -(R-Y) or RGB
– Three RGB matrices available: NTSC(Japan), NTSC(USA) or EBU
– 64 different background colors and 4096 different frame colors
– Plain or 3D frame with variable width and height
• Data Slicing:
– Slicing of closed-caption (CC) or wide-screen-signaling (WSS) data
– Violence blocking capability (V-chip)
– Several filter for XDS data extraction
• On-screen display:
– 64 characters programmable
– 5 characters displayed in every PIP picture or 3 rows of 20 characters each
– 4 different character luminance values or frame color
– 4 background luminance values or (semi-) transparent mode
• I2C-Bus control (400 kHz)
• High stability clock generation
• PDSO 28-1 package (SMD)
• Full SDA 9488X and SDA 9588X backward compatibility
• SDA 9388X / SDA 9389X pinout compatibility
• 3.3V supply voltage (5V input capable)

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| SDA 5550 M | Small size, light weight, heavy reverse power. / Low coil power consumption. | SDA 9189X | |
| SDA 9288XE | Advanced MPS⑩ Micro Port Saver EEPROM with Block Lock⑩ Protection | SDA 9361-2 | 2-Wire Serial EEPROM |
| SDA0032 | SURFACE MOUNT STEP RECOVERY DIODE | SDA0036 | FAST RECOVERY DIODES Stud Version |
| SDA004-7 | DATA BUS TRANSIENT SUPPRESSOR | SDA007 | 5V, 3.3V, ISRTM High-Performance CPLDs |
| SDA007B1 | 64 x 4 Cascadable FIFO / 64 x 5 Cascadable FIFO | SDA010 | 128K x 36 and 256K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM |
| SDA010B1 | SDA01H0K | Low Profile DIP Switches | |
| SDA01H0KD | Low Profile DIP Switches | SDA01H0SK | Low Profile DIP Switches |
| SDA01H0SKD | Low Profile DIP Switches | SDA01H1KD | Low Profile DIP Switches |
| SDA01H1SKD | Low Profile DIP Switches | SDA02-54 | 256K x 18 Synchronous-Pipelined Cache RAM |